With the advancement of semiconductor manufacturing techniques, current semiconductor fabrication technologies continue to reduce pattern sizes and increase transistor and circuit speeds. To ensure a pattern is properly sized (e.g., devices do not improperly overlap or interact with one another), design rules are used to define parameters, such as the tolerances between devices and interconnecting lines, and the widths of such lines. A design rule limitation, also known as a critical dimension (CD), can define a minimum width of a line or a minimum space between two lines permitted in the fabrication of the devices for a given technology (e.g., 90 nm). CD errors in a device or between devices may arise from any number of sources, such as optical (e.g., lens field curvature or lens aberration in a photolithography system), mechanical, or chemical (e.g., thickness non-uniformity of resist coating and antireflection coating (ARC)) sources. However, current metrology tools, such as a critical dimension scanning electron microscope (CD-SEM), cannot obtain sufficient CD information from various pattern profiles during photomask fabrication.